Abstract: Due to reduction in transistor size, test engineer facing an issue to minimize power during testing of VLSI circuits. Increased switching activity of the Circuit Under Test (CUT during ...

Abstract: The memory-based hippocampus-inspired model (MBHIM) that has been proposed by the authors is a model that reproduces episodic memory suitable for VLSI implementation. While an MBHIM VLSI ...

This is a VLSI designing Project. This Project is created using Cadence Virtuoso software. It Includes Basic Logic Gates to simple ALU design. Logic Gates like AND,OR,NAND,NOR XOR. Also used this ...

This repository contains the design, simulation, and performance evaluation of a CMOS NAND Gate using Cadence Virtuoso. The project highlights the design principles and operational characteristics of ...