The Lattice Double Data Rate (DDR3) Physical Interface (PHY) IP is a general-purpose IP that provides connectivity between a DDR3 memory Controller (MC) and the DDR3 memory devices compliant with ...

The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency ... This memory controller supports DDR4, DDR3, DDR3L, LPDDR4 SDRAM. This memory controller is a ...