SAN JOSE, Calif. - Plans for the next generation of Verilog are unfolding at this week's EDA Front-to-Back Conference, as the Accellera standards organization announces the initial completion of a ...

Sometimes good ideas take a while to catch on in engineering practice. The use of in-line assertions to document assumptions and check for problems in RTL code is one such idea. Long ago proposed for ...

FOSTER CITY, Calif.-- July 18, 2003--Fintronic USA, Inc., a leading provider of high-performance Verilog simulators announced the release of an API-based interface between Super FinSim? and the ...

Never in my wildest dreams did I think that the Verilog hardware description language (HDL) would spawn an industry and be a fixture of electronics design for more than 15 years. HDLs were a ...

Breathing LEDs are an attractive adornment on many electronic devices. These days they’re typically controlled by software but of course there were fading effects back in the days of analog too.

A key part of any analogue design flow is having models of the components for simulation. Traditional Spice models of basic components such as transistors and capacitors written in C or C++ are ...

NAPA, CA-Accellera, the EDA organization focused on language-based design standards, announced today that as part of its continuing efforts to improve hardware description languages (HDLs) for ...

The world of open-source software is making inroads into areas beyond operating systems, Internet and desktop applications, GUIs and scripting languages. One less well-known area of open-source ...

The latest version of Accellera’s Verilog-Analog Mixed-Signal (AMS) standard, Verilog-AMS 2.3, unifies the standard’s previous version with IEEE Std. 1364-2005, the Verilog hardware description ...

A Cambridge firm has developed a tool that converts a Verilog description of hardware into C. Tenison EDA said its VTOC tool will allow designers to make efficient C models of their hardware, speeding ...