The 74ABT00 is a quad 2-input NAND gate. This device is fully specified for partial power down applications using Ioff. The Ioff circuitry disables the output, preventing the potentially damaging ...
This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...
The 74AHC00-Q100; 74AHCT00-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. JESD7-A. The ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback