Design-Reuse4 年
DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR IP is compliant with the latest JEDEC standards and is silicon proven. This memory controller supports DDR4, DDR3, DDR3L, LPDDR4 SDRAM. This memory controller is a high-speed interface used ...
Design-Reuse1 年
DDR3L Memory Controller IP optimized for low latency
DDR3L interface provides full support for the DDR3L interface, compatible with DDR3L protocol standard of 8GB_DDR3L and DFI-version 3.1 or higher Specification Compliant. Through its DDR3L ...