Abstract: This paper presents a 2-to-8-b scalable digital SRAM-based CIM macro that is co-designed with a multiply-less neural-network (NN) design methodology and incorporates dynamic-logic-based ...

Abstract: Amid a strife for ever-growing AI processing capabilities at the edge, compute-in-memory (CIM) SRAMs involving current-based dot-product (DP) operators have become excellent candidates to ...