资讯

IEEE23 天

VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL ...

Our findings underscore the considerable challenges faced by existing LLMs in VHDL code generation, revealing significant scope for improvement. This study emphasizes the necessity of supervised ...
IEEE25 天

ADC and TDC implemented using FPGA - IEEE Xplore

Several tests of FPGA devices programmed as analog waveform digitizers are discussed. The ADC uses the ramping-comparing scheme. A multi-channel ADC can be implemented with only a few resistors and ...
GitHub5 天

Sigma Delta ADCs and DACs for FPGA - GitHub

Recently I stumbled across a research paper describing how an Analog-to-Digital (ADC) converter can be implemented almost entirely within an FPGA. The paper illustrated how a differential input LVDS ...
GitHub4 天

A Dual Artix-7 FPGA board intended for developing Chip-Chip interface ...

ArtixDuo A Dual Artix-7 FPGA board intended for developing Chip-Chip interface busses and advanced FPGA projects Overview This board is currently on Rev 2. As testing and bringup continue, more ...