资讯

TechRepublic3 年

Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit

They demonstrate the design of some logic circuits using the series-connected CMOS-NDR circuit based on the MOnostable-BIstable transition Logic Element (MOBILE) theory.
Design-Reuse11 年

VeriSilicon GSMC 0.18um General Process, Low Power circuit design ...

VeriSilicon GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM VeriSilicon GSMC 0.18um Synchronous Low Power Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing ...
Semiconductor Engineering2 年

Non-Traditional Design of Dynamic Logic Gates and Circuits with FDSOI FETs

A new technical paper titled “Non-Traditional Design of Dynamic Logics using FDSOI for Ultra-Efficient Computing” was published by researchers at University of Stuttgart, UC Berkeley, Indian Institute ...
Semiconductor Engineering1 年

Applying a Floating Gate Field Effect Transistor To A Logic-in-Memory ...

Find the technical paper here. Published August 2023. S. Kim et al., “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET),” in IEEE Access, vol. 11, pp.